研究了过孔接触电阻变化规律，并进行机理分析，为优化薄膜晶体管的过孔设计提供依据。首先，运用开尔文四线检测法对不同大小、形状、数量的钼/铝/钼结构的栅极和源/漏层金属与氧化铟锡连接过孔的接触电阻进行测试。然后，通过扫描电子显徽镜、能量色散 X射线光谱仪和聚焦离子束显徽镜对过孔内部形貌进行表征。最后，对过孔接触电阻变化规律进行机理分析。实验结果表明：过孔面积越大，接触电阻越小；过孔面积相同时，长方形过孔的接触电阻小于正方形过孔的接触电阻，多小孔的接触电阻小于单大孔的接触电阻，栅极金属与氧化铟锡的过孔接触电阻小于源/漏层金属与氧化铟锡的过孔接触电阻。为了降低钼/铝/钼与氧化铟锡连接过孔的接触电阻，过孔面积尽可能最大化，采用长方形过孔优于正方形过孔，多小过孔优于单大孔设计，同时优化过孔刻蚀工艺，减少过孔内顶层钼的损失。
In order to optimize via hole design of TFT array substrate and reduce via hole contact re-sistance,the contact resistance of different size,shape,number of Mo/Al/Mo and Indium-Tin Oxide (ITO)connection via holes are tested by Kelvin Four-terminal sensing.Then via hole morphology is characterized by scanning electron microscopy (SEM),focused ion beam (FIB)and energy dispersive spectroscopy (EDS).Finally,the mechanism of via hole contact resistance test results are analyzed. Experimental results indicate that the bigger via hole area is,the smaller the contact resistance will be,and in the same via hole area,the contact resistance of rectangular via hole is smaller than that of a square via hole,the contact resistance of the multi small holes is smaller than that of the single big via hole,the via hole contact resistance of Gate metal and ITO is smaller than that of SD metal and ITO.For reducing via hole contact resistance,via hole area is maximized.The rectangular via hole is better than that of the square via hole,the multi small holes are better than that of the single big via hole,and via etch process is optimized to reduce top Mo loss.
参考文献
| [1] | 闫方亮;沈世妃;侯智;刘祖宏;郑载润;刘锋;李斗熙.a-Si厚度对TFT开关特性的影响[J].现代显示,2011(7):23-28. |
| [2] | Muhammad Mustafa Hussain;Nairn Moumen;Zhibo Zhang.Metal Wet Etch Issues and Effects In Dual Metal Gate Stack Integration[J].Journal of the Electrochemical Society,20065(5):G389-G393. |
| [3] | 张定涛;李文彬;姚立红;郑云友;李伟;袁明.大尺寸TFT-LCD ECCP刻蚀工艺低耗整合[J].液晶与显示,2014(1):7-14. |
| [4] | Kwang-Ho Jang;Soo-Jung Hwang;Young-Chang Joo.Effect of Capping Layer on Hillock Formation in Thin Al Films[J].METALS AND MATERIALS International,20082(2):147-150. |
| [5] | 刘翔;陈旭;谢振宇;高浩然;王威.使用低电阻金属铝制造薄膜晶体管阵列信号电极[J].液晶与显示,2009(4):533-536. |
| [6] | Gruner G.Carbon nanotube films for transparent and plastic electronics[J].Journal of Materials Chemistry: An Interdisciplinary Journal dealing with Synthesis, Structures, Properties and Applications of Materials, Particulary Those Associated with Advanced Technology,200635(35):3533-3539. |
| [7] | 刘翔;薛建设;周伟峰;戴天明;郝照慧;杨静;宁策;张学辉;孙冰.改善沉积氮化硅薄膜对FFS-TFT透明电极ITO影响的研究[J].真空科学与技术学报,2012(1):36-38. |
| [8] | Brian G. Lewis;David C. Paine.Applications and Processing of Transparent Conducting Oxides[J].MRS bulletin,20008(8):22-27. |
| [9] | Seo H S;Choi J B;Yun D C.Simple process of Hillock-free Al-gate metallization without ITO/Al contact problems for large-area TFT-LCDs[J].SID,199829:375-378. |
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