比较研究了GaAs背面通孔腐蚀中的湿法腐蚀和ICP干法刻蚀技术,并利用感应离子耦合(ICP)干法刻蚀技术,采用CCl2F2/Ar混合气体,对GaAs衬底上的通孔工艺进行了研究.通过优化气压、射频功率、CCl2F2/Ar混合气体组分配比,在CCl2F2流量为200sccm,Ar流量为10sccm,源功率Ps=400W,偏压功率Pb=14W,自偏压Vb=120V,真空度P=43Pa时,得到了表面平滑的通孔形貌和最大的通孔刻蚀速率(4.3μm/min).
参考文献
| [1] | Daga O P;Fricke K;Hartnagel H L .Improved Via Hole Etching for Source Grounding of Microwave MESFET[J].Journal of the Electrochemical Society,1986,133(12):2660-2661. |
| [2] | Deligeorgis G;Lagadas M;Constantinidi G.Improvement of uniformity in conventional RIE process for via hole fabrication in GaAs based MMICs[A].,2000:163-166. |
| [3] | Sumitani K;Komaru M;Kobiki M.A high aspect ratio via hole dry etching technology for high power GaAs MESFET[A].,1989:22-25. |
| [4] | Chung M S;Kim H R;Lee J E et al.Via hole process for GaAs monolithic mirowave integrated circuit using two - step dry etching[J].Journal of Vacuum Science and Technology B:Microelectronics and Nanometer Structures,1993,11(02):159-162. |
| [5] | Salimian S;Cooper C B;Day M E .Dry etching of via connections for GaAs monolithic microwave integrated circuits fabrication[J].Journal of Vacuum Science and Technology B:Microelectronics and Nanometer Structures,1987,5(06):1606-1610. |
| [6] | Henry Hendriks;Jim Crites;Gerald D'Urso.Challenge in Rapidly Scaling up Backside Processing of GaAs Wafers[A].,2001 |
| [7] | E. W. Berg;S. W. Pang .Low-pressure etching of nanostructures and via holes using an inductively coupled plasma system[J].Journal of the Electrochemical Society,1999(2):775-779. |
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